1. Field of the Invention
This invention relates to memory cells and more particularly to an array of cells the output of which is detected as a quantity of charge as distinguished from detecting a steady current flow.
2. Description of the Prior Art
Nonvolatile variable threshold memory cells, which possess the properties of being capable of having the conductive threshold of the surface of the semiconductor body altered has been amply described in the prior art. In addition, the prior art has also described various semiconductor materials that exhibit the ability of being able to have its conduction varied between a high and low threshold condition and thus, represent binary information. However, until recently, the prior art has been restricted to the use of separate source and drain lines and the use of detection devices for detecting current flow between the source and drain to indicate the presence of a high or low threshold condition.
However, it is important in the design of integrated circuit memory devices, whether they be electrically alterable or not, that large numbers of bits be utilized in order to achieve the largest capacity possible on a given size chip. Accordingly, it is prime consideration of the design engineer to maximize the number of bits of the basic memory cells per chip, consistent with high reliability. Along these lines, other attempts have been made to maximize the number of bits that can be manufactured on a given chip by utilizing a common drain line for adjacent columns of transistors. While this reduces cell size, the space occupied by the drain connection is still an appreciable fraction of the total cell area.